The present application relates to a four terminal composite switching device and in particular to a high unity current gain frequency four terminal composite switching device with a high voltage compliance. The present invention also relates to the field of current switches using four terminal composite switching devices. The present invention also relates to the field of digital to analog converters using current switches and in particular to high efficiency, high power digital to analog converters.
The ability of prior art devices to perform high power amplification and signal generation at microwave and millimeter wave frequencies is limited by the breakdown voltage and/or high unity current gain frequency, ft, of the device. For such devices, high breakdown voltage and high ft characteristics are generally mutually exclusive since high breakdown voltage semiconductor materials have larger bandgaps and hence lower electron mobility, and conversely, high frequency performance semiconductors have higher electron mobility but lower breakdown voltages.
Traditionally, microwave and millimeter wave power amplification has been dominated by mostly analog class AB implementations. Other configurations such as class E, F, and S implementations have been used to improve the efficiency or linearity of generated signals, but simultaneous performance improvement in linearity, power output and maximum frequency has been difficult to achieve.
In microwave and millimeter wave applications, a high speed and high power Digital to Analog Converter (DAC) could be used to replace power amplifiers allowing for improved system linearity. In addition, high unity current gain frequency, high power DACs could be used to generate microwave signals straight from digital signals without the need for analog up-converters. The ability to translate digital signals to analog signals without analog up-converters improves the system performance by eliminating the degradation caused by out-of-band spurs generated by analog up-conversion. The functional operation of a DAC is well known. Generally, a DAC accepts a digital input signal and converts it into an analog output signal. The digital input signal has a range of digital codes which are converted into a continuous range of analog signal levels of the analog output signal.
Referring now to FIG. 1, a functional block diagram is shown of a conventional DAC 100 that is capable of high speed switching. This DAC 100 is a differential binary weighted converter comprising two inverted R-2R resistance ladder circuits 101, 102 having resistors whose resistance values are R and 2R and a plurality of differential current-switch circuits 120, structured identically to one another. The number of current switches is equal to the number of input bits of the DAC 100. The current switch circuits 120 are electrically connected between the R-2R ladder networks and a negative potential voltage Vee, i.e. xe2x88x925 volts. The true outputs of each of the current switches are electrically connected to one of the two inverted R-2R resistance ladders. The false outputs of each of the current switches are electrically connected to the other of the two inverted R-2R resistance ladders. An external reference is applied to VDAC, and the R-2R ladder divides the input current into binary weighted currents. The digital input is used to control the position of the switches.
Further, in the prior art, digital to analog design utilizing the highest speed, high unity current gain frequency, integrated circuit technology for clock rates greater than 1 GHz results in technologies that have lower breakdown voltages than the higher voltage technology used for power applications, such as microwave and millimeter applications. The present invention enables a fully digital architecture through a power amplifier with speeds commensurate with lower breakdown voltage technologies and output powers commensurate with higher breakdown voltage, lower frequency technologies.
One object of the present invention is to provide a switching architecture that can support both high unity current gain frequency, ft, and high voltages and that effectively provides the ability to simultaneously achieve linearity, high power output and maximum frequency.
According to one embodiment of the present invention, the current switch comprises a first stage fabricated in a high ft, low band gap semiconductor such as an InP HBT (Heterojunction Bipolar Transistor). The critical property of this technology is that it provides the highest possible current switching speed. The current output drives a second stage comprising of a cascoded three terminal device fabricated in a high breakdown voltage semiconductor such as a GaN Field-Effect Transistor (FET) or HBT. By operating the second stage as a cascode, the device can switch at much higher speed than would normally be obtained with such device.
It is an object of this invention to provide a high unity current gain frequency composite device with high voltage compliance. A device in accordance with the present invention comprises a switch stage implemented in a high unity current gain frequency, ft, technology with low breakdown voltage, combined with a second stage having a high maximum oscillation frequency, fmax and a high breakdown voltage. High ft technology preferably refers to ft greater than or equal to 150 GHz for HBT technologies and ft greater than or equal to 100 GHz for FET technologies. High breakdown voltages are preferably greater than low breakdown voltages, and low breakdown voltages are preferably less than or equal to 5V.
In another embodiment, the device is preferably electrically coupled to a current source. The result is a high unity current gain frequency current switch with high voltage compliance.
In a preferred embodiment the first stage utilizes InP-HBT technology to achieve high unity current gain frequency, in a hybrid, possibly flip-chip assembly, while the second cascode switch stage utilizes GaN FET technology for high voltage.
In one embodiment, the present invention relates to digital to analog converters comprising a plurality of high ft, high voltage compliance current switches. The digital to analog converters are especially suited for microwave and millimeter wave applications.
In one embodiment, the present invention relates to a device comprising: a first stage comprising at least one first stage semiconductor device, said at least one first stage semiconductor device having a first stage semiconductor device breakdown voltage less than or equal to 5 volts, said at least one first stage semiconductor device having a unity current gain frequency greater than or equal to 100 GHz; and a second stage comprising at least one second stage semiconductor device, said at least one second stage semiconductor device having a second stage semiconductor breakdown voltage greater than the first stage semiconductor device breakdown voltage, and said second stage being electrically coupled to said first stage.
In one embodiment, the present invention relates to a dual-ended current switch comprising: a current source; a first stage comprising at least one first stage semiconductor device, said at least one first stage semiconductor device having a first stage semiconductor device breakdown voltage less than or equal to 5 volts, said at least one first stage semiconductor device having a unity current gain frequency greater than or equal to 100 GHz, and said first stage being electrically coupled to said current source; and a second stage comprising at least one second stage semiconductor device, said at least one second stage semiconductor device having a second stage semiconductor breakdown voltage greater than the first stage semiconductor device breakdown voltage, and said second stage being electrically coupled to said first stage such that said first stage is in between said current source and said second stage.
In another embodiment, the present invention relates to a single-ended current switch comprising: a current source; a first stage comprising at least one first stage semiconductor device, said at least one first stage semiconductor device having a first stage semiconductor device breakdown voltage less than or equal to 5 volts, said at least one first stage semiconductor device having a unity current gain frequency greater than or equal to 100 GHz, and said first stage being electrically coupled to said current source; and a second stage comprising at least one second stage semiconductor device, said at least one second stage semiconductor device having a second stage semiconductor breakdown voltage greater than the first stage semiconductor device breakdown voltage, and said second stage being electrically coupled to said first stage such that said first stage is in between said current source and said second stage
It is another object of this invention to provide a digital-to-analog converter comprising: a plurality of current switches; and a plurality of R-2R ladder networks electrically coupled to said plurality of current switches; wherein each of said plurality of current switches comprises: a current source; a first stage comprising at least one first stage semiconductor device, said at least one first stage semiconductor device having a first stage semiconductor device breakdown voltage less than or equal to 5 volts, said at least one first stage semiconductor device having a unity current gain frequency greater than or equal to 100 GHz, and said first stage being electrically coupled to said current source; and a second stage comprising at least one second stage semiconductor device, said at least one second stage semiconductor device having a second stage semiconductor breakdown voltage greater than the first stage semiconductor device breakdown voltage, and said second stage being electrically coupled to said first stage such that said first stage is in between said current source and said second stage.